User contributions
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- 17:23, 25 July 2019 (diff | hist) . . (-3) . . Programming Model (→NaplesPU Vector intrinsics) (current)
- 17:02, 25 July 2019 (diff | hist) . . (+1,524) . . Programming Model (→NaplesPU Intrinsics)
- 16:57, 25 July 2019 (diff | hist) . . (+27) . . Programming Model
- 16:46, 25 July 2019 (diff | hist) . . (+44) . . Programming Model (→Barrier Instruction)
- 16:46, 25 July 2019 (diff | hist) . . (+1,637) . . Programming Model (→NaplesPU Other Aspects)
- 16:42, 25 July 2019 (diff | hist) . . (+10) . . Programming Model (→NaplesPU Vector intrinsics)
- 16:41, 25 July 2019 (diff | hist) . . (+1,268) . . Programming Model (→NaplesPU Vector intrinsics)
- 16:36, 25 July 2019 (diff | hist) . . (+860) . . Programming Model (→NaplesPU Vector intrinsics)
- 16:34, 25 July 2019 (diff | hist) . . (+329) . . Programming Model (→Standard LLVM intrinsics)
- 16:33, 25 July 2019 (diff | hist) . . (+199) . . Programming Model (→NaplesPU Other Aspects)
- 16:03, 25 July 2019 (diff | hist) . . (-1) . . Programming Model (→NaplesPU Vector intrinsics)
- 15:57, 25 July 2019 (diff | hist) . . (+291) . . Programming Model (→NaplesPU Vector intrinsics)
- 15:50, 25 July 2019 (diff | hist) . . (+6) . . Programming Model (→NaplesPU Vector intrinsics)
- 15:49, 25 July 2019 (diff | hist) . . (+403) . . Programming Model (→NaplesPU Vector intrinsics)
- 15:27, 25 July 2019 (diff | hist) . . (+1,417) . . Programming Model (→NaplesPU Other Aspects)
- 11:12, 12 July 2019 (diff | hist) . . (+347) . . L2 and Directory cache controller (→Replacement Logic) (current)
- 11:19, 8 July 2019 (diff | hist) . . (-57) . . Scratchpad unit (→Kernel example: matrix multiplication)
- 14:55, 2 July 2019 (diff | hist) . . (+12) . . MC System (→MC tile) (current)
- 14:12, 2 July 2019 (diff | hist) . . (-3) . . MC System (→NPU tile)
- 12:34, 2 July 2019 (diff | hist) . . (-2) . . Network router (→First stage) (current)
- 12:05, 2 July 2019 (diff | hist) . . (-9) . . Network interface (→Rebuilt packets queue) (current)
- 15:21, 1 July 2019 (diff | hist) . . (-12) . . L1 Cache Controller (→Stall Protocol ROMs) (current)
- 15:16, 1 July 2019 (diff | hist) . . (-2) . . L1 Cache Controller
- 13:20, 1 July 2019 (diff | hist) . . (-1) . . Include (→Network Defines) (current)
- 13:15, 1 July 2019 (diff | hist) . . (+95) . . Include (→User Defines)
- 13:13, 1 July 2019 (diff | hist) . . (+5) . . SC Logger (current)
- 13:11, 1 July 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Configuring NaplesPU) (current)
- 13:10, 1 July 2019 (diff | hist) . . (+126) . . Heterogeneous Tile (→Service Message Interface) (current)
- 13:06, 1 July 2019 (diff | hist) . . (-2) . . Heterogeneous Tile (→Service Message Interface)
- 13:06, 1 July 2019 (diff | hist) . . (+96) . . Heterogeneous Tile (→Service Message Interface)
- 13:04, 1 July 2019 (diff | hist) . . (-4) . . Heterogeneous Tile (→Service Message Interface)
- 13:04, 1 July 2019 (diff | hist) . . (+4) . . Heterogeneous Tile (→Service Message Interface)
- 13:03, 1 July 2019 (diff | hist) . . (+2,945) . . Heterogeneous Tile
- 12:36, 1 July 2019 (diff | hist) . . (-82) . . Extending NaplesPU (→SystemVerilog coding NaplesPU guidelines) (current)
- 15:38, 28 June 2019 (diff | hist) . . (-1) . . ISA (→M type instructions) (current)
- 15:38, 28 June 2019 (diff | hist) . . (+149) . . ISA (→M type instructions)
- 15:35, 28 June 2019 (diff | hist) . . (-348) . . ISA (→M type instructions)
- 15:34, 28 June 2019 (diff | hist) . . (+331) . . ISA (→M type instructions)
- 15:21, 28 June 2019 (diff | hist) . . (+6) . . ISA (→M type instructions)
- 15:21, 28 June 2019 (diff | hist) . . (0) . . N File:M format new.png (current)
- 15:21, 28 June 2019 (diff | hist) . . (-6) . . ISA (→M type instructions)
- 15:20, 28 June 2019 (diff | hist) . . (+4) . . ISA (→M type instructions)
- 15:19, 28 June 2019 (diff | hist) . . (+6) . . ISA (→M type instructions)
- 15:19, 28 June 2019 (diff | hist) . . (0) . . N File:M format.png (current)
- 15:19, 28 June 2019 (diff | hist) . . (+1,414) . . ISA (→M type instructions)
- 15:16, 28 June 2019 (diff | hist) . . (+6) . . ISA (→J type instructions)
- 15:16, 28 June 2019 (diff | hist) . . (0) . . N File:J format.png (current)
- 15:16, 28 June 2019 (diff | hist) . . (+413) . . ISA (→J type instructions)
- 15:15, 28 June 2019 (diff | hist) . . (+6) . . ISA (→C type instructions)
- 15:15, 28 June 2019 (diff | hist) . . (0) . . N File:C format.png (current)
- 15:15, 28 June 2019 (diff | hist) . . (+405) . . ISA (→C type instructions)
- 15:13, 28 June 2019 (diff | hist) . . (-18) . . ISA (→R type instructions)
- 15:13, 28 June 2019 (diff | hist) . . (-18) . . ISA (→I type instructions)
- 15:12, 28 June 2019 (diff | hist) . . (+6) . . ISA (→MOVEI type instructions)
- 15:12, 28 June 2019 (diff | hist) . . (0) . . N File:MOVEI format.png (current)
- 15:12, 28 June 2019 (diff | hist) . . (-10) . . ISA (→MOVEI type instructions)
- 15:11, 28 June 2019 (diff | hist) . . (+518) . . ISA (→MOVEI type instructions)
- 15:05, 28 June 2019 (diff | hist) . . (+6) . . ISA (→I type instructions)
- 15:04, 28 June 2019 (diff | hist) . . (0) . . N File:I instr.png (current)
- 15:04, 28 June 2019 (diff | hist) . . (+639) . . ISA (→I type instructions)
- 14:59, 28 June 2019 (diff | hist) . . (+854) . . ISA (→R type instructions)
- 14:57, 28 June 2019 (diff | hist) . . (+6) . . ISA (→R type instructions)
- 14:57, 28 June 2019 (diff | hist) . . (0) . . N File:RR format.png (current)
- 14:57, 28 June 2019 (diff | hist) . . (+5) . . ISA (→R type instructions)
- 14:56, 28 June 2019 (diff | hist) . . (+91) . . ISA (→R type instructions)
- 14:53, 28 June 2019 (diff | hist) . . (+641) . . ISA
- 14:52, 28 June 2019 (diff | hist) . . (+1) . . Core (→Control registers) (current)
- 15:44, 25 June 2019 (diff | hist) . . (+6) . . Coherence Injection (→Understanding the Testbench) (current)
- 15:43, 25 June 2019 (diff | hist) . . (0) . . N File:Tb coherence injection schema new.jpg (current)
- 15:43, 25 June 2019 (diff | hist) . . (-2) . . Coherence Injection (→Understanding the Testbench)
- 15:43, 25 June 2019 (diff | hist) . . (0) . . File:Tb coherence injection schema.jpg (Mirko uploaded a new version of File:Tb coherence injection schema.jpg) (current)
- 15:34, 25 June 2019 (diff | hist) . . (+13) . . SC Synch (current)
- 15:33, 25 June 2019 (diff | hist) . . (-34) . . SC Synch
- 15:32, 25 June 2019 (diff | hist) . . (-45) . . SC Logger
- 15:31, 25 June 2019 (diff | hist) . . (-35) . . SC Item (current)
- 15:28, 25 June 2019 (diff | hist) . . (-339) . . SC Item
- 15:24, 25 June 2019 (diff | hist) . . (+235) . . SC Item
- 15:21, 25 June 2019 (diff | hist) . . (+312) . . SC Logger
- 15:18, 25 June 2019 (diff | hist) . . (+41) . . SC Item (→Querying Logger)
- 15:17, 25 June 2019 (diff | hist) . . (+13) . . SC System (current)
- 15:16, 25 June 2019 (diff | hist) . . (+104) . . SC System
- 15:13, 25 June 2019 (diff | hist) . . (+4) . . Network interface (→Core to network module)
- 15:11, 25 June 2019 (diff | hist) . . (-13) . . Network interface (→Control unit)
- 14:39, 25 June 2019 (diff | hist) . . (+6) . . Programming Model (→Execution Model Matching)
- 14:39, 25 June 2019 (diff | hist) . . (0) . . N File:Execution model new.png (current)
- 14:38, 25 June 2019 (diff | hist) . . (-1) . . Programming Model (→Execution Model Matching)
- 14:36, 25 June 2019 (diff | hist) . . (0) . . Programming Model (→Memory Model Matching)
- 14:36, 25 June 2019 (diff | hist) . . (0) . . File:Memory mod new.png (Mirko uploaded a new version of File:Memory mod new.png) (current)
- 14:35, 25 June 2019 (diff | hist) . . (-1) . . Programming Model (→Memory Model Matching)
- 14:35, 25 June 2019 (diff | hist) . . (+1) . . Programming Model (→Memory Model Matching)
- 14:34, 25 June 2019 (diff | hist) . . (+6) . . Programming Model (→Memory Model Matching)
- 14:34, 25 June 2019 (diff | hist) . . (0) . . N File:Memory mod new.png
- 14:34, 25 June 2019 (diff | hist) . . (-2) . . Programming Model (→Memory Model Matching)
- 14:33, 25 June 2019 (diff | hist) . . (+6) . . Programming Model (→OpenCL support for NaplesPU)
- 14:33, 25 June 2019 (diff | hist) . . (0) . . N File:Plat model new.png (current)
- 14:32, 25 June 2019 (diff | hist) . . (-2) . . Programming Model (→OpenCL support for NaplesPU)
- 14:32, 25 June 2019 (diff | hist) . . (0) . . File:Plat model.png (Mirko uploaded a new version of File:Plat model.png) (current)
- 14:09, 25 June 2019 (diff | hist) . . (-22) . . Network (→General architecture) (current)
- 13:54, 25 June 2019 (diff | hist) . . (-1) . . MSI Protocol (→The key role of MC_Ack) (current)
- 13:54, 25 June 2019 (diff | hist) . . (-51) . . MSI Protocol (→Limited directory memory)
- 13:52, 25 June 2019 (diff | hist) . . (+306) . . L2 and Directory cache controller (→Message Generator)
- 13:47, 25 June 2019 (diff | hist) . . (+1) . . L2 and Directory cache controller (→Replacement Logic)
- 13:47, 25 June 2019 (diff | hist) . . (-141) . . L2 and Directory cache controller (→Replacement Logic)
- 13:13, 25 June 2019 (diff | hist) . . (-36) . . L2 and Directory cache controller (→Replacement Logic)
- 13:01, 25 June 2019 (diff | hist) . . (-254) . . L2 and Directory cache controller (→Cache Update Logic)
- 12:54, 25 June 2019 (diff | hist) . . (-236) . . L2 and Directory cache controller (→TSHR Update Logic)
- 12:49, 25 June 2019 (diff | hist) . . (+99) . . L2 and Directory cache controller (→Protocol ROM)
- 12:49, 25 June 2019 (diff | hist) . . (+10) . . L2 and Directory cache controller (→Protocol ROM)
- 12:47, 25 June 2019 (diff | hist) . . (+1,691) . . L2 and Directory cache controller (→Stage 3)
- 12:33, 25 June 2019 (diff | hist) . . (-4) . . L2 and Directory cache controller (→Stage 2)
- 12:28, 25 June 2019 (diff | hist) . . (+24) . . L2 and Directory cache controller (→Stage 1)
- 12:19, 25 June 2019 (diff | hist) . . (+2) . . L2 and Directory cache controller (→Stage 1)
- 12:04, 25 June 2019 (diff | hist) . . (+21) . . L2 and Directory cache controller
- 11:58, 25 June 2019 (diff | hist) . . (+13) . . L1 Cache Controller (→Cache Update Logic)
- 11:50, 25 June 2019 (diff | hist) . . (+36) . . L1 Cache Controller (→MSHR Update Logic)
- 11:43, 25 June 2019 (diff | hist) . . (+6) . . L1 Cache Controller (→Replacement Logic)
- 11:40, 25 June 2019 (diff | hist) . . (+3) . . L1 Cache Controller (→Issuing a Request)
- 11:39, 25 June 2019 (diff | hist) . . (-4) . . L1 Cache Controller (→Request Issue Signals)
- 11:39, 25 June 2019 (diff | hist) . . (+358) . . L1 Cache Controller (→Stage 1)
- 11:28, 25 June 2019 (diff | hist) . . (-4) . . L1 Cache Controller (→Assumptions)
- 18:32, 21 June 2019 (diff | hist) . . (-102) . . L1 Cache Controller (→MSHR Update Logic)
- 18:18, 21 June 2019 (diff | hist) . . (+174) . . L1 Cache Controller (→Replacement Logic)
- 18:06, 21 June 2019 (diff | hist) . . (-34) . . L1 Cache Controller (→Protocol ROM)
- 17:20, 21 June 2019 (diff | hist) . . (+83) . . L1 Cache Controller (→Protocol ROM)
- 17:17, 21 June 2019 (diff | hist) . . (+28) . . L1 Cache Controller (→MSHR)
- 17:14, 21 June 2019 (diff | hist) . . (-110) . . L1 Cache Controller (→Hit/miss logic)
- 17:07, 21 June 2019 (diff | hist) . . (+27) . . L1 Cache Controller (→Requests Scheduler)
- 17:05, 21 June 2019 (diff | hist) . . (+2) . . L1 Cache Controller (→Request Issue Signals)
- 17:05, 21 June 2019 (diff | hist) . . (+1) . . L1 Cache Controller (→Request Issue Signals)
- 16:54, 21 June 2019 (diff | hist) . . (+64) . . L1 Cache Controller (→Request Issue Signals)
- 16:48, 21 June 2019 (diff | hist) . . (+377) . . L1 Cache Controller (→Stall Protocol ROMs)
- 16:45, 21 June 2019 (diff | hist) . . (-25) . . L1 Cache Controller (→Stall Protocol ROMs)
- 16:38, 21 June 2019 (diff | hist) . . (+4) . . L1 Cache Controller (→MSHR Signals)
- 16:37, 21 June 2019 (diff | hist) . . (0) . . L1 Cache Controller (→Assumptions)
- 16:36, 21 June 2019 (diff | hist) . . (+3) . . L1 Cache Controller (→Assumptions)
- 16:36, 21 June 2019 (diff | hist) . . (+26) . . L1 Cache Controller
- 16:31, 21 June 2019 (diff | hist) . . (+15) . . MSI Protocol (→The key role of MC_Ack)
- 16:27, 21 June 2019 (diff | hist) . . (+80) . . MSI Protocol (→The key role of MC_Ack)
- 16:07, 21 June 2019 (diff | hist) . . (+24) . . MSI Protocol (→The key role of MC_Ack)
- 16:04, 21 June 2019 (diff | hist) . . (+344) . . MSI Protocol (→Transitions of state N)
- 15:55, 21 June 2019 (diff | hist) . . (-115) . . MSI Protocol (→Limited directory memory)
- 15:49, 21 June 2019 (diff | hist) . . (+27) . . Network interface (→General architecture)
- 15:47, 21 June 2019 (diff | hist) . . (+10) . . Network (→Data structures)
- 15:28, 21 June 2019 (diff | hist) . . (+34) . . MC Item (→Running threads) (current)
- 15:28, 21 June 2019 (diff | hist) . . (+9) . . MC Item (→Setting PCs)
- 15:27, 21 June 2019 (diff | hist) . . (+1) . . MC Item
- 15:25, 21 June 2019 (diff | hist) . . (+7) . . Heterogeneous Tile (→Adding custom logic)
- 15:24, 21 June 2019 (diff | hist) . . (+22) . . Heterogeneous Tile (→Synchronization Interface)
- 15:23, 21 June 2019 (diff | hist) . . (+11) . . Heterogeneous Tile
- 15:21, 21 June 2019 (diff | hist) . . (+18) . . MC System (→H2C tile)
- 15:21, 21 June 2019 (diff | hist) . . (+1) . . MC System (→MC tile)
- 15:21, 21 June 2019 (diff | hist) . . (+8) . . MC System (→MC tile)
- 15:20, 21 June 2019 (diff | hist) . . (+9) . . MC System (→NPU tile)
- 15:19, 21 June 2019 (diff | hist) . . (+41) . . MC System (→NPU tile)
- 15:18, 21 June 2019 (diff | hist) . . (+9) . . MC System (→NPU tile)
- 15:17, 21 June 2019 (diff | hist) . . (+7) . . MC System (→NPU tile)
- 15:15, 21 June 2019 (diff | hist) . . (-1) . . Core (→Result Composer)
- 15:14, 21 June 2019 (diff | hist) . . (+535) . . Core (→Result Composer)
- 15:13, 21 June 2019 (diff | hist) . . (+647) . . Core (→Result Composer)
- 15:10, 21 June 2019 (diff | hist) . . (+1,512) . . Core (→Writeback stage)
- 15:07, 21 June 2019 (diff | hist) . . (+69) . . Core (→Result Composer)
- 14:56, 21 June 2019 (diff | hist) . . (-1) . . Synchronization (→Barrier Synchronization Protocol) (current)
- 14:48, 21 June 2019 (diff | hist) . . (-111) . . Scratchpad unit
- 14:47, 21 June 2019 (diff | hist) . . (+1,821) . . Core (→Control registers)
- 14:27, 21 June 2019 (diff | hist) . . (-15) . . Core (→Cache Pseudo-LRU)
- 14:27, 21 June 2019 (diff | hist) . . (+70) . . Core (→Cache Pseudo-LRU)
- 14:26, 21 June 2019 (diff | hist) . . (+647) . . Core (→Cache Pseudo-LRU)
- 14:21, 21 June 2019 (diff | hist) . . (+26) . . Basic comps (→Memory Banks)
- 14:20, 21 June 2019 (diff | hist) . . (+182) . . Basic comps
- 14:15, 21 June 2019 (diff | hist) . . (0) . . Include (→Synchronization Defines)
- 14:15, 21 June 2019 (diff | hist) . . (+36) . . Include (→Synchronization Defines)
- 14:14, 21 June 2019 (diff | hist) . . (+50) . . Include (→Scratchpad Memory Defines)
- 14:13, 21 June 2019 (diff | hist) . . (+16) . . Include (→User Defines)
- 14:13, 21 June 2019 (diff | hist) . . (+27) . . Include (→NPU Defines)
- 14:12, 21 June 2019 (diff | hist) . . (+12) . . Include (→Coherence Defines)
- 14:11, 21 June 2019 (diff | hist) . . (+5) . . Include (→Synchronization Defines)
- 14:10, 21 June 2019 (diff | hist) . . (+24) . . Include (→Network Defines)
- 14:09, 21 June 2019 (diff | hist) . . (+5) . . Include (→Scratchpad Memory Defines)
- 14:08, 21 June 2019 (diff | hist) . . (-20) . . Include (→NPU Defines)
- 14:07, 21 June 2019 (diff | hist) . . (+38) . . Include (→User Defines)
- 14:06, 21 June 2019 (diff | hist) . . (+11) . . Include
- 14:04, 21 June 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Tile Overview)
- 14:01, 21 June 2019 (diff | hist) . . (-1) . . Main Page (→simulate.sh script)
- 14:00, 21 June 2019 (diff | hist) . . (-1) . . Main Page (→setup_project.sh script)
- 13:57, 21 June 2019 (diff | hist) . . (-6) . . Main Page (→Getting started)
- 17:04, 20 June 2019 (diff | hist) . . (-44) . . MSI Protocol
- 16:58, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Cache Controller)
- 16:57, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Directory Controller)
- 16:57, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Directory Controller)
- 16:57, 20 June 2019 (diff | hist) . . (+7) . . MSI Protocol (→Directory Controller)
- 16:57, 20 June 2019 (diff | hist) . . (0) . . N File:MSI Protocol dc-rom new.png (current)
- 16:57, 20 June 2019 (diff | hist) . . (-3) . . MSI Protocol (→Directory Controller)
- 15:38, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Cache Controller)
- 15:38, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Cache Controller)
- 15:37, 20 June 2019 (diff | hist) . . (0) . . File:MSI Protocol cc-rom p2 new.png (Mirko uploaded a new version of File:MSI Protocol cc-rom p2 new.png) (current)
- 15:37, 20 June 2019 (diff | hist) . . (+7) . . MSI Protocol (→Cache Controller)
- 15:36, 20 June 2019 (diff | hist) . . (0) . . N File:MSI Protocol cc-rom p2 new.png
- 15:36, 20 June 2019 (diff | hist) . . (-3) . . MSI Protocol (→Cache Controller)
- 15:32, 20 June 2019 (diff | hist) . . (0) . . MSI Protocol (→Cache Controller)
- 15:32, 20 June 2019 (diff | hist) . . (+7) . . MSI Protocol (→Cache Controller)
- 15:32, 20 June 2019 (diff | hist) . . (0) . . N File:MSI Protocol cc-rom p1 new.png (current)
- 15:32, 20 June 2019 (diff | hist) . . (-3) . . MSI Protocol (→Cache Controller)
- 13:38, 20 June 2019 (diff | hist) . . (-2) . . ISA (→Instructions Format)
- 13:38, 20 June 2019 (diff | hist) . . (-117) . . ISA (→Register File)
- 13:37, 20 June 2019 (diff | hist) . . (+118) . . ISA (→Register File)
- 13:37, 20 June 2019 (diff | hist) . . (-118) . . ISA (→Register File)
- 13:37, 20 June 2019 (diff | hist) . . (-546) . . ISA (→M type instructions)
- 13:34, 20 June 2019 (diff | hist) . . (0) . . N File:ScalarRegFile new.png (current)
- 13:34, 20 June 2019 (diff | hist) . . (0) . . N File:VectorRegFile new.png (current)
- 13:34, 20 June 2019 (diff | hist) . . (+8) . . ISA (→Register File)
- 13:32, 20 June 2019 (diff | hist) . . (0) . . File:ScalarRegFile.png (Mirko uploaded a new version of File:ScalarRegFile.png) (current)
- 13:27, 20 June 2019 (diff | hist) . . (-329) . . ISA (→Register File)
- 13:09, 20 June 2019 (diff | hist) . . (+74) . . ISA (→C type instructions)
- 13:07, 20 June 2019 (diff | hist) . . (-90) . . ISA (→R type instructions)
- 13:05, 20 June 2019 (diff | hist) . . (-2) . . ISA (→R type instructions)
- 13:05, 20 June 2019 (diff | hist) . . (+59) . . ISA (→R type instructions)
- 13:00, 20 June 2019 (diff | hist) . . (-22) . . ISA
- 15:41, 19 June 2019 (diff | hist) . . (-2) . . NaplesPU Clang Documentation
- 15:40, 19 June 2019 (diff | hist) . . (0) . . m NaplesPU Clang Documentation (Mirko moved page Nu+ Clang Documentation to NaplesPU Clang Documentation)
- 15:40, 19 June 2019 (diff | hist) . . (+42) . . N Nu+ Clang Documentation (Mirko moved page Nu+ Clang Documentation to NaplesPU Clang Documentation) (current)
- 15:40, 19 June 2019 (diff | hist) . . (+99) . . Toolchain
- 15:38, 19 June 2019 (diff | hist) . . (-52) . . Main Page (→Documentation)
- 15:36, 19 June 2019 (diff | hist) . . (-18) . . Programming Model (→NaplesPU Misc Intrinsics)
- 15:36, 19 June 2019 (diff | hist) . . (0) . . N File:NPU Intr.png (current)
- 15:36, 19 June 2019 (diff | hist) . . (+22) . . Programming Model (→NaplesPU Misc Intrinsics)
- 15:33, 19 June 2019 (diff | hist) . . (+5) . . Programming Model
- 15:32, 19 June 2019 (diff | hist) . . (-14) . . Programming Model
- 15:27, 19 June 2019 (diff | hist) . . (-10) . . Extending NaplesPU
- 15:24, 19 June 2019 (diff | hist) . . (0) . . m Extending NaplesPU (Mirko moved page Extending nu+ to Extending NaplesPU)
- 15:24, 19 June 2019 (diff | hist) . . (+32) . . N Extending nu+ (Mirko moved page Extending nu+ to Extending NaplesPU) (current)
- 15:23, 19 June 2019 (diff | hist) . . (+25) . . Main Page (→Documentation)
- 15:23, 19 June 2019 (diff | hist) . . (-651) . . Main Page
- 15:07, 19 June 2019 (diff | hist) . . (+26) . . Main Page
- 15:06, 19 June 2019 (diff | hist) . . (-61) . . Coherence Injection
- 15:00, 19 June 2019 (diff | hist) . . (-25) . . System deployment (current)
- 15:00, 19 June 2019 (diff | hist) . . (0) . . N File:NPU nexys4.png (current)
- 14:59, 19 June 2019 (diff | hist) . . (+25) . . System deployment
- 14:59, 19 June 2019 (diff | hist) . . (-10) . . System deployment
- 14:56, 19 June 2019 (diff | hist) . . (+2) . . SC Logger
- 14:55, 19 June 2019 (diff | hist) . . (-7) . . SC Synch
- 14:54, 19 June 2019 (diff | hist) . . (+11) . . Single Core Cache Controller (current)
- 14:52, 19 June 2019 (diff | hist) . . (-4) . . SC Item
- 14:52, 19 June 2019 (diff | hist) . . (+25) . . SC System
- 14:51, 19 June 2019 (diff | hist) . . (-72) . . SC System
- 14:51, 19 June 2019 (diff | hist) . . (0) . . N File:NPU sc system.png (current)
- 14:51, 19 June 2019 (diff | hist) . . (+70) . . SC System
- 14:48, 19 June 2019 (diff | hist) . . (+4) . . The NaplesPU Hardware architecture
- 14:47, 19 June 2019 (diff | hist) . . (-291) . . Network router
- 14:46, 19 June 2019 (diff | hist) . . (0) . . File:First stage.jpg (Mirko uploaded a new version of File:First stage.jpg) (current)
- 14:43, 19 June 2019 (diff | hist) . . (+21) . . Network
- 14:42, 19 June 2019 (diff | hist) . . (+9) . . Main Page
- 14:40, 19 June 2019 (diff | hist) . . (-58) . . Coherence (→Cache Coherence Protocol) (current)
- 14:39, 19 June 2019 (diff | hist) . . (+61) . . MSI Protocol
- 14:35, 19 June 2019 (diff | hist) . . (-430) . . Coherence (→Cache Hierarchy)
- 14:30, 19 June 2019 (diff | hist) . . (+9) . . Coherence
- 14:29, 19 June 2019 (diff | hist) . . (-9) . . MC Item
- 14:28, 19 June 2019 (diff | hist) . . (+7) . . Scratchpad unit (→Bank Steering Unit)
- 14:26, 19 June 2019 (diff | hist) . . (-5) . . Synchronization
- 14:22, 19 June 2019 (diff | hist) . . (-54) . . Core (→Operand fetch stage)
- 14:17, 19 June 2019 (diff | hist) . . (+17) . . Core
- 14:14, 19 June 2019 (diff | hist) . . (+37) . . The NaplesPU Hardware architecture
- 14:14, 19 June 2019 (diff | hist) . . (-37) . . The NaplesPU Hardware architecture
- 14:14, 19 June 2019 (diff | hist) . . (0) . . File:Npu manycore.png (Mirko uploaded a new version of File:Npu manycore.png) (current)
- 14:12, 19 June 2019 (diff | hist) . . (0) . . N File:Npu manycore.png
- 14:12, 19 June 2019 (diff | hist) . . (+10) . . The NaplesPU Hardware architecture
- 14:11, 19 June 2019 (diff | hist) . . (-4) . . Heterogeneous Tile
- 14:09, 19 June 2019 (diff | hist) . . (+6) . . MC System (→NPU tile)
- 14:09, 19 June 2019 (diff | hist) . . (-6) . . MC System (→NPU tile)
- 14:08, 19 June 2019 (diff | hist) . . (0) . . N File:Tile npu.png (current)
- 14:08, 19 June 2019 (diff | hist) . . (-3) . . MC System (→NPU tile)
- 14:06, 19 June 2019 (diff | hist) . . (0) . . Include (→NPU Defines)
- 14:06, 19 June 2019 (diff | hist) . . (-23) . . Include
- 14:03, 19 June 2019 (diff | hist) . . (0) . . File:Manycore.png (Mirko uploaded a new version of File:Manycore.png) (current)
- 14:03, 19 June 2019 (diff | hist) . . (0) . . File:Manycore.png (Mirko uploaded a new version of File:Manycore.png)
- 14:02, 19 June 2019 (diff | hist) . . (-945) . . The NaplesPU Hardware architecture
- 13:56, 19 June 2019 (diff | hist) . . (+48) . . N The nu+ Hardware architecture (Mirko moved page The nu+ Hardware architecture to The NaplesPU Hardware architecture) (current)
- 13:56, 19 June 2019 (diff | hist) . . (0) . . m The NaplesPU Hardware architecture (Mirko moved page The nu+ Hardware architecture to The NaplesPU Hardware architecture)
- 13:55, 19 June 2019 (diff | hist) . . (0) . . File:Manycore.png (Mirko uploaded a new version of File:Manycore.png)
- 13:52, 19 June 2019 (diff | hist) . . (+5) . . The NaplesPU Hardware architecture (→Common components)
- 13:51, 19 June 2019 (diff | hist) . . (0) . . MC System (→NPU tile)
- 13:51, 19 June 2019 (diff | hist) . . (0) . . MC System (→NPU tile)
- 13:51, 19 June 2019 (diff | hist) . . (-3) . . MC System (→NPU tile)
- 13:50, 19 June 2019 (diff | hist) . . (+5) . . MC System (→NPU tile)
- 13:50, 19 June 2019 (diff | hist) . . (-8) . . MC System
- 13:47, 19 June 2019 (diff | hist) . . (0) . . File:Tile nuplus.png (Mirko uploaded a new version of File:Tile nuplus.png) (current)
- 10:55, 7 June 2019 (diff | hist) . . (-11) . . Main Page (→simulate.sh script)
- 17:35, 3 June 2019 (diff | hist) . . (+124) . . Programming Model (→Thread Parallelism)
- 17:33, 3 June 2019 (diff | hist) . . (+397) . . Programming Model (→Thread Parallelism)
- 17:30, 3 June 2019 (diff | hist) . . (+135) . . Programming Model (→Thread Parallelism)
- 17:28, 3 June 2019 (diff | hist) . . (-40) . . Core (→Control registers)
- 17:27, 3 June 2019 (diff | hist) . . (+442) . . Programming Model (→Learning by Example)
- 17:21, 3 June 2019 (diff | hist) . . (-8) . . Programming Model
- 17:20, 3 June 2019 (diff | hist) . . (-74) . . Programming Model
- 17:17, 3 June 2019 (diff | hist) . . (+57) . . Programming Model (→Nu+ Other Aspects)
- 17:17, 3 June 2019 (diff | hist) . . (+14) . . Programming Model (→Nu+ Other Aspects)
- 17:15, 3 June 2019 (diff | hist) . . (-2) . . Programming Model
- 17:15, 3 June 2019 (diff | hist) . . (-2) . . Programming Model
- 17:14, 3 June 2019 (diff | hist) . . (+3,326) . . Programming Model
- 17:10, 3 June 2019 (diff | hist) . . (+26) . . Programming Model
- 17:09, 3 June 2019 (diff | hist) . . (+19) . . Programming Model
- 17:08, 3 June 2019 (diff | hist) . . (+3,471) . . Programming Model (→Nu+ Programming Model)
- 17:07, 3 June 2019 (diff | hist) . . (+766) . . Programming Model
- 17:00, 3 June 2019 (diff | hist) . . (+707) . . Programming Model (→Matrix Multiplication Vectorial Example)
- 16:55, 3 June 2019 (diff | hist) . . (+809) . . Programming Model (→Nu+ Programming Model)
- 16:49, 3 June 2019 (diff | hist) . . (-205) . . Programming Model
- 16:48, 3 June 2019 (diff | hist) . . (+270) . . Programming Model
- 16:48, 3 June 2019 (diff | hist) . . (0) . . File:Intr.png (Mirko uploaded a new version of File:Intr.png) (current)
- 16:47, 3 June 2019 (diff | hist) . . (0) . . N File:Intr.png
- 16:31, 3 June 2019 (diff | hist) . . (-1) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:30, 3 June 2019 (diff | hist) . . (+1,141) . . Programming Model (→Nu+ Programming Model)
- 16:16, 3 June 2019 (diff | hist) . . (+617) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:13, 3 June 2019 (diff | hist) . . (+265) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:10, 3 June 2019 (diff | hist) . . (+62) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:09, 3 June 2019 (diff | hist) . . (-2) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:09, 3 June 2019 (diff | hist) . . (+173) . . Programming Model (→Matrix Multiplication Multithreaded Example)
- 16:06, 3 June 2019 (diff | hist) . . (+288) . . Programming Model
- 16:04, 3 June 2019 (diff | hist) . . (-3) . . Scratchpad unit (→Interface)
- 16:01, 3 June 2019 (diff | hist) . . (+527) . . Programming Model
- 15:50, 3 June 2019 (diff | hist) . . (+466) . . Programming Model
- 15:08, 3 June 2019 (diff | hist) . . (-9,888) . . Programming Model (→OpenCL Example)
- 15:01, 3 June 2019 (diff | hist) . . (+94) . . Programming Model (→OpenCL Example)
- 14:53, 3 June 2019 (diff | hist) . . (+9,892) . . Programming Model (→OpenCL Example)
- 14:29, 3 June 2019 (diff | hist) . . (+4) . . Programming Model (→OpenCL Example)
- 14:29, 3 June 2019 (diff | hist) . . (+1) . . Programming Model (→OpenCL Example)
- 14:29, 3 June 2019 (diff | hist) . . (+103) . . Programming Model (→OpenCL Example)
- 14:27, 3 June 2019 (diff | hist) . . (+770) . . Programming Model
- 14:21, 3 June 2019 (diff | hist) . . (-519) . . Programming Model
- 14:13, 3 June 2019 (diff | hist) . . (0) . . Programming Model (→OpenCL Runtime Execution Flow)
- 14:13, 3 June 2019 (diff | hist) . . (+454) . . Programming Model (→OpenCL Runtime Execution Flow)
- 14:09, 3 June 2019 (diff | hist) . . (+65) . . Programming Model
- 14:09, 3 June 2019 (diff | hist) . . (0) . . N File:Runtime.png (current)
- 13:57, 3 June 2019 (diff | hist) . . (+488) . . Programming Model (→OpenCL Runtime Design)
- 13:44, 3 June 2019 (diff | hist) . . (+278) . . Programming Model
- 13:44, 3 June 2019 (diff | hist) . . (0) . . N File:Uml.png (current)
- 13:40, 3 June 2019 (diff | hist) . . (+1,454) . . Programming Model
- 13:34, 3 June 2019 (diff | hist) . . (-170) . . Programming Model (→Memory Model Matching)
- 13:32, 3 June 2019 (diff | hist) . . (+1) . . Programming Model (→Memory Model Matching)
- 13:32, 3 June 2019 (diff | hist) . . (0) . . Programming Model (→Memory Model Matching)
- 13:32, 3 June 2019 (diff | hist) . . (+1,193) . . Programming Model
- 13:25, 3 June 2019 (diff | hist) . . (+31) . . Programming Model
- 13:25, 3 June 2019 (diff | hist) . . (0) . . N File:Memory mod.png (current)
- 13:18, 3 June 2019 (diff | hist) . . (+29) . . Programming Model
- 13:03, 3 June 2019 (diff | hist) . . (0) . . Programming Model
- 13:02, 3 June 2019 (diff | hist) . . (0) . . Programming Model
- 13:02, 3 June 2019 (diff | hist) . . (+36) . . Programming Model
- 13:02, 3 June 2019 (diff | hist) . . (0) . . N File:Execution model.png (current)
- 13:01, 3 June 2019 (diff | hist) . . (+798) . . Programming Model (→OpenCL support for Nu+)
- 12:57, 3 June 2019 (diff | hist) . . (+6) . . Programming Model (→OpenCL support for Nu+)
- 12:56, 3 June 2019 (diff | hist) . . (+608) . . N Programming Model (Created page with "== OpenCL support for Nu+ == OpenCL defines a platform as a set of computing devices on which the host is connected to. Each device is further divided into several compute un...")
- 12:56, 3 June 2019 (diff | hist) . . (0) . . N File:Plat model.png
- 12:49, 3 June 2019 (diff | hist) . . (0) . . m Single Core Cache Controller (Mirko moved page SC CC to Single Core Cache Controller)
- 12:49, 3 June 2019 (diff | hist) . . (+42) . . N SC CC (Mirko moved page SC CC to Single Core Cache Controller) (current)
- 12:49, 3 June 2019 (diff | hist) . . (+42) . . Main Page (→Documentation)
- 16:32, 30 May 2019 (diff | hist) . . (-91) . . Main Page (→Documentation)
- 16:19, 30 May 2019 (diff | hist) . . (0) . . File:Nup nexys4.png (Mirko uploaded a new version of File:Nup nexys4.png) (current)
- 16:18, 30 May 2019 (diff | hist) . . (+1) . . System deployment
- 16:18, 30 May 2019 (diff | hist) . . (0) . . N File:Nup nexys4.png
- 16:01, 30 May 2019 (diff | hist) . . (0) . . File:Nup sc system.png (Mirko uploaded a new version of File:Nup sc system.png) (current)
- 15:56, 30 May 2019 (diff | hist) . . (0) . . SC System
- 15:56, 30 May 2019 (diff | hist) . . (+4) . . SC System
- 15:55, 30 May 2019 (diff | hist) . . (0) . . N File:Nup sc system.png
- 15:33, 30 May 2019 (diff | hist) . . (0) . . Heterogeneous Tile
- 15:33, 30 May 2019 (diff | hist) . . (0) . . MC System (→H2C tile)
- 15:33, 30 May 2019 (diff | hist) . . (0) . . MC System (→MC tile)
- 15:32, 30 May 2019 (diff | hist) . . (0) . . MC System (→NUPLUS tile)
- 16:03, 29 May 2019 (diff | hist) . . (+5) . . Heterogeneous Tile
- 16:02, 29 May 2019 (diff | hist) . . (0) . . N File:Tile ht.png (current)
- 15:41, 29 May 2019 (diff | hist) . . (+5) . . MC System (→H2C tile)
- 15:40, 29 May 2019 (diff | hist) . . (0) . . N File:Tile h2c.png (current)
- 15:08, 29 May 2019 (diff | hist) . . (0) . . File:Tile mc.png (Mirko uploaded a new version of File:Tile mc.png) (current)
- 15:07, 29 May 2019 (diff | hist) . . (0) . . MC System (→MC tile)
- 15:07, 29 May 2019 (diff | hist) . . (+5) . . MC System (→MC tile)
- 15:06, 29 May 2019 (diff | hist) . . (0) . . N File:Tile mc.png
- 14:37, 29 May 2019 (diff | hist) . . (0) . . File:Tile nuplus.png (Mirko uploaded a new version of File:Tile nuplus.png)
- 13:10, 29 May 2019 (diff | hist) . . (0) . . MC System (→NUPLUS tile)
- 13:10, 29 May 2019 (diff | hist) . . (+9) . . MC System (→NUPLUS tile)
- 13:09, 29 May 2019 (diff | hist) . . (0) . . N File:Tile nuplus.png
- 16:58, 24 May 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture
- 16:23, 17 May 2019 (diff | hist) . . (-20) . . MC System (→NUPLUS tile)
- 16:22, 17 May 2019 (diff | hist) . . (+60) . . MC System (→NUPLUS tile)
- 16:21, 17 May 2019 (diff | hist) . . (-9) . . MC System
- 16:20, 17 May 2019 (diff | hist) . . (+90) . . MC System
- 16:19, 17 May 2019 (diff | hist) . . (+443) . . MC System (→H2C tile)
- 16:13, 17 May 2019 (diff | hist) . . (+2,856) . . MC System (→MC tile)
- 15:46, 17 May 2019 (diff | hist) . . (+893) . . MC System (→IO Interface)
- 15:35, 17 May 2019 (diff | hist) . . (+312) . . MC System (→NUPLUS tile)
- 15:32, 17 May 2019 (diff | hist) . . (+221) . . MC System (→NUPLUS tile)
- 15:28, 17 May 2019 (diff | hist) . . (+477) . . MC System (→NUPLUS tile)
- 15:23, 17 May 2019 (diff | hist) . . (+248) . . MC System (→NUPLUS tile)
- 15:19, 17 May 2019 (diff | hist) . . (+338) . . MC System (→NUPLUS tile)
- 15:12, 17 May 2019 (diff | hist) . . (+429) . . MC System (→NUPLUS tile)
- 13:35, 17 May 2019 (diff | hist) . . (+1,064) . . MC System (→NUPLUS tile)
- 13:26, 17 May 2019 (diff | hist) . . (+408) . . MC System (→NUPLUS tile)
- 13:18, 17 May 2019 (diff | hist) . . (+227) . . MC System
- 13:14, 17 May 2019 (diff | hist) . . (+360) . . MC System
- 13:13, 17 May 2019 (diff | hist) . . (-27) . . L2 and Directory cache controller
- 13:02, 17 May 2019 (diff | hist) . . (+345) . . MC System
- 16:30, 16 May 2019 (diff | hist) . . (+2) . . MC System
- 14:46, 16 May 2019 (diff | hist) . . (+6) . . MC System (→NUPLUS tile)
- 14:45, 16 May 2019 (diff | hist) . . (0) . . N File:NU.jpg (current)
- 14:45, 16 May 2019 (diff | hist) . . (+16) . . MC System (→NUPLUS tile)
- 13:10, 16 May 2019 (diff | hist) . . (+1) . . MC Item
- 13:09, 16 May 2019 (diff | hist) . . (+65) . . MC System (→HT tile)
- 13:09, 16 May 2019 (diff | hist) . . (+6) . . MC System (→H2C tile)
- 13:09, 16 May 2019 (diff | hist) . . (0) . . N File:H2C.jpg (current)
- 13:08, 16 May 2019 (diff | hist) . . (+18) . . MC System (→H2C tile)
- 13:08, 16 May 2019 (diff | hist) . . (+6) . . MC System (→MC tile)
- 13:08, 16 May 2019 (diff | hist) . . (0) . . N File:MC.jpg (current)
- 13:07, 16 May 2019 (diff | hist) . . (+17) . . MC System (→MC tile)
- 12:57, 16 May 2019 (diff | hist) . . (+80) . . N MC System (Created page with "== NUPLUS tile == == MC tile == == H2C tile == == NONE tile == == HT tile ==")
- 12:36, 16 May 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Many Core System)
- 12:35, 16 May 2019 (diff | hist) . . (+23) . . The NaplesPU Hardware architecture (→Many Core System)
- 12:33, 16 May 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Many Core System)
- 12:22, 16 May 2019 (diff | hist) . . (+201) . . MC Item
- 18:41, 15 May 2019 (diff | hist) . . (+4) . . MC Item
- 18:41, 15 May 2019 (diff | hist) . . (+20) . . MC Item
- 18:40, 15 May 2019 (diff | hist) . . (+1,147) . . MC Item
- 18:29, 15 May 2019 (diff | hist) . . (0) . . SC Item
- 18:28, 15 May 2019 (diff | hist) . . (-6) . . SC Item
- 18:27, 15 May 2019 (diff | hist) . . (+78) . . SC Item (→HN_BOOT_COMMAND)
- 18:26, 15 May 2019 (diff | hist) . . (+25) . . SC Item
- 18:24, 15 May 2019 (diff | hist) . . (-211) . . System deployment
- 18:23, 15 May 2019 (diff | hist) . . (+2) . . System deployment (→Console commands)
- 18:23, 15 May 2019 (diff | hist) . . (+1) . . System deployment (→Console commands)
- 18:23, 15 May 2019 (diff | hist) . . (+1) . . System deployment (→Console commands)
- 18:22, 15 May 2019 (diff | hist) . . (+831) . . System deployment (→Console commands)
- 18:13, 15 May 2019 (diff | hist) . . (+275) . . System deployment (→Console commands)
- 18:05, 15 May 2019 (diff | hist) . . (+207) . . System deployment (→Console commands)
- 18:03, 15 May 2019 (diff | hist) . . (+1,366) . . System deployment (→Console commands)
- 17:55, 15 May 2019 (diff | hist) . . (+37) . . System deployment (→Console commands)
- 17:54, 15 May 2019 (diff | hist) . . (+300) . . System deployment (→Console commands)
- 17:47, 15 May 2019 (diff | hist) . . (+234) . . System deployment (→Console commands)
- 16:18, 15 May 2019 (diff | hist) . . (+6) . . Heterogeneous Tile
- 16:17, 15 May 2019 (diff | hist) . . (-6) . . Heterogeneous Tile
- 16:17, 15 May 2019 (diff | hist) . . (0) . . N File:HT.jpg (current)
- 16:17, 15 May 2019 (diff | hist) . . (+23) . . Heterogeneous Tile
- 13:52, 15 May 2019 (diff | hist) . . (+6) . . The NaplesPU Hardware architecture (→Common components)
- 13:41, 15 May 2019 (diff | hist) . . (-5) . . The NaplesPU Hardware architecture (→Single Core Version)
- 13:31, 15 May 2019 (diff | hist) . . (+78) . . SC System
- 19:51, 14 May 2019 (diff | hist) . . (+1,338) . . System deployment (→Uart Router)
- 19:38, 14 May 2019 (diff | hist) . . (+129) . . System deployment (→Host interaction)
- 19:35, 14 May 2019 (diff | hist) . . (+668) . . System deployment (→Host interaction)
- 19:29, 14 May 2019 (diff | hist) . . (+6) . . System deployment (→Host interaction)
- 19:29, 14 May 2019 (diff | hist) . . (+1,554) . . System deployment (→Host interaction)
- 19:06, 14 May 2019 (diff | hist) . . (+27) . . System deployment (→Project Setup)
- 19:05, 14 May 2019 (diff | hist) . . (-1) . . System deployment (→Project Setup)
- 19:04, 14 May 2019 (diff | hist) . . (+2,138) . . System deployment
- 19:01, 14 May 2019 (diff | hist) . . (-13) . . System deployment (→Memory Controller)
- 19:00, 14 May 2019 (diff | hist) . . (0) . . System deployment
- 19:00, 14 May 2019 (diff | hist) . . (+12) . . System deployment
- 19:00, 14 May 2019 (diff | hist) . . (+6) . . System deployment
- 18:59, 14 May 2019 (diff | hist) . . (+18) . . System deployment (→Memory Controller)
- 18:58, 14 May 2019 (diff | hist) . . (+1,486) . . System deployment
- 18:44, 14 May 2019 (diff | hist) . . (+552) . . System deployment (→Memory Controller)
- 18:38, 14 May 2019 (diff | hist) . . (+1,022) . . System deployment (→Memory Controller)
- 18:34, 14 May 2019 (diff | hist) . . (+1,433) . . System deployment (→Memory Controller)
- 18:30, 14 May 2019 (diff | hist) . . (0) . . System deployment
- 18:30, 14 May 2019 (diff | hist) . . (+303) . . System deployment (→Memory Controller)
- 18:26, 14 May 2019 (diff | hist) . . (+257) . . System deployment
- 18:23, 14 May 2019 (diff | hist) . . (0) . . System deployment
- 18:23, 14 May 2019 (diff | hist) . . (+298) . . System deployment
- 18:17, 14 May 2019 (diff | hist) . . (+38) . . System deployment
- 17:48, 14 May 2019 (diff | hist) . . (+6) . . System deployment
- 17:48, 14 May 2019 (diff | hist) . . (+1) . . System deployment
- 17:44, 14 May 2019 (diff | hist) . . (+397) . . N System deployment (Created page with "TODO: descrizione uart_router, memory_controller, con riferimento a template nexys4ddr, (comandi, console) e memoria, disegno/schema, interazione con host, loading memoria, av...")
- 17:43, 14 May 2019 (diff | hist) . . (0) . . N File:Nexys4DDR.jpg (current)
- 17:29, 14 May 2019 (diff | hist) . . (-265) . . The NaplesPU Hardware architecture (→Single Core Version)
- 17:25, 14 May 2019 (diff | hist) . . (+9) . . SC Item
- 17:23, 14 May 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Single Core Version)
- 17:21, 14 May 2019 (diff | hist) . . (-1) . . SC System
- 17:20, 14 May 2019 (diff | hist) . . (+1) . . SC System
- 17:20, 14 May 2019 (diff | hist) . . (0) . . File:SC System.jpg (Mirko uploaded a new version of File:SC System.jpg) (current)
- 17:19, 14 May 2019 (diff | hist) . . (+9) . . The NaplesPU Hardware architecture
- 17:15, 14 May 2019 (diff | hist) . . (+25) . . SC System
- 17:14, 14 May 2019 (diff | hist) . . (+26) . . SC System
- 17:14, 14 May 2019 (diff | hist) . . (0) . . N File:SC System.jpg
- 15:42, 14 May 2019 (diff | hist) . . (+3) . . Heterogeneous Tile (→Adding custom logic)
- 15:41, 14 May 2019 (diff | hist) . . (+7) . . Heterogeneous Tile (→Adding custom logic)
- 15:41, 14 May 2019 (diff | hist) . . (-6) . . Heterogeneous Tile (→Adding custom logic)
- 15:41, 14 May 2019 (diff | hist) . . (+1,637) . . Heterogeneous Tile (→Adding custom logic)
- 15:38, 14 May 2019 (diff | hist) . . (+1,638) . . Heterogeneous Tile
- 15:32, 14 May 2019 (diff | hist) . . (+1,701) . . Heterogeneous Tile
- 15:13, 14 May 2019 (diff | hist) . . (+960) . . Single Core Cache Controller (→To/from Thread controller)
- 15:07, 14 May 2019 (diff | hist) . . (+1,515) . . Single Core Cache Controller (→Interface)
- 14:28, 14 May 2019 (diff | hist) . . (-5) . . The NaplesPU Hardware architecture (→Single Core Version)
- 14:28, 14 May 2019 (diff | hist) . . (-1) . . Single Core Cache Controller (→Memory swap)
- 14:27, 14 May 2019 (diff | hist) . . (-48) . . Single Core Cache Controller (→Memory swap)
- 14:25, 14 May 2019 (diff | hist) . . (-945) . . Single Core Cache Controller (→Snoop managing)
- 14:19, 14 May 2019 (diff | hist) . . (-69) . . Single Core Cache Controller (→Instruction miss request)
- 14:16, 14 May 2019 (diff | hist) . . (+122) . . Single Core Cache Controller (→IO, Instruction and Core Interface requests buffering)
- 14:10, 14 May 2019 (diff | hist) . . (-778) . . Single Core Cache Controller (→IO, Instruction and Core Interface requests buffering)
- 14:07, 14 May 2019 (diff | hist) . . (-101) . . Single Core Cache Controller (→IO, Instruction and Core Interface requests buffering)
- 14:00, 14 May 2019 (diff | hist) . . (+140) . . Single Core Cache Controller (→Combinatorial section)
- 13:57, 14 May 2019 (diff | hist) . . (+516) . . Single Core Cache Controller (→Combinatorial section)
- 13:51, 14 May 2019 (diff | hist) . . (+88) . . Single Core Cache Controller (u)
- 13:47, 14 May 2019 (diff | hist) . . (+233) . . Single Core Cache Controller (→Combinatorial section)
- 13:42, 14 May 2019 (diff | hist) . . (-54) . . Single Core Cache Controller (→Combinatorial section)
- 13:38, 14 May 2019 (diff | hist) . . (+820) . . Single Core Cache Controller (→Sequential section)
- 13:27, 14 May 2019 (diff | hist) . . (+20) . . Single Core Cache Controller (→Sequential section)
- 13:22, 14 May 2019 (diff | hist) . . (+7) . . Single Core Cache Controller (→Sequential section)
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