NaplesPU has a custom vector Instruction Set Architecture, or ISA, which distinguishes it from the majority of open-source processor implementations available out there. The rationale behind this choice lies in the very inherent nature of the NaplesPU project and its basic value proposition: being an open, fully customizable, natively vector accelerator. We faced the creation of a custom (LLVM-based) compiler back-end, made available along with the hardware, and indeed we believe that having full control of the compilation toolchain may truly enable the highest degree of architectural exploration capabilities, the basic philosophy of the NaplesPU project.
A custom ISA.. why?
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