Difference between revisions of "NaplesPU LLD Linker"

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(Created page with "When adding a new target architecture to llvm, some changes are required to the tools located in the llvm/tools folder. ==== llvm-objdump ==== This is the llvm object file dum...")
 
 
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When adding a new target architecture to llvm, some changes are required to the tools located in the llvm/tools folder.
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LLD is the LLVM proprietary linker. It is based on the GNU linker, and it is compatible to it in terms of arguments accepted. It also fully supports the ''ELF'' generation but also, in a progressive lower percentage, ''PE/COFF'', ''Mach-O'', ''WebAssembly'' and custom linker-scripts.
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==== llvm-objdump ====
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LLD is built as a set of libraries to join the main idea of the software modular design.
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This is the llvm object file dumper. The full documentation for llvm-objdump is maintained as a Texinfo manual. If the info and llvm-objdump programs are properly installed, the command
 
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<code> info llvm-objdump <\code> should give you access to the complete manual.
 
  
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In order to be properly used with the NuPlus architecture the following change is required.
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The NaplesPU implementation of LLD is made on an ELF-based approach, by adding a new Target class inside lld/ELF/Arch folder. [[NaplesPU.cpp]] contains the ''relocation'' logic and other information needed to support NaplesPU. Each NaplesPU application must be linked together with two additional object files:
  
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<syntaxhighlight lang="cpp" line='line'>
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* ''crt0.o'', is the object file resulting of the compilation of the start routine for the custom platform, composed of operations needed to set-up the platform.
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template <class ELFT>
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* ''vectors.o'', is the Interrupt Vector Table.
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static std::error_code getRelocationValueString(const ELFObjectFile<ELFT> *Obj,
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                                                const RelocationRef &RelRef,
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== Relocations ==
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                                                SmallVectorImpl<char> &Result) {
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This section explains how the relocations are implemented in NaplesPU. 
−
  ...
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All relocations are specified in the ''relocateOne'' method implementation. By looking at the target ISA, LLD must check for each instruction type in which an immediate value is specified to verify if it can fit the machine instruction field.
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  switch (EF.getHeader()->e_machine) {
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−
  ...
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<syntaxhighlight>
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  case ELF::EM_NUPLUS:
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void NaplesPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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    res = Target;
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  int64_t Offset;
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    break;
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  switch (Type) {
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  default:
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    fatal("unrecognized reloc " + Twine(Type));
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    case R_NUPLUS_ABS32:
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    write32le(Loc, Val);
 +
    break;
 +
  case R_NUPLUS_BRANCH:
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    //Check Offset for J-Type Instructions
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    checkInt(Loc, Val, 18, Type);
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    applyNaplesPUReloc<18, 0>(Loc, Type, Val);
 +
    break;
 +
  case R_NUPLUS_PCREL_MEM:
 +
    //Check Offset for M-Type Instructions
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    checkInt(Loc, Val, 9, Type);
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    applyNaplesPUReloc<9, 3>(Loc, Type, Val);
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    break;
 +
  case R_NUPLUS_PCREL_LEA:
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    //Check Offset for I-Type Instructions
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    checkInt(Loc, Val, 9, Type);
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    applyNaplesPUReloc<9, 3>(Loc, Type, Val);
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    break;
 +
  case R_NUPLUS_ABS_HIGH_LEA:
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    //Check Offset for MOVEI-Type Instructions
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    checkInt(Loc, (Val >> 16) & 0xFFFF , 16, Type);
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    applyNaplesPUReloc<16, 2>(Loc, Type, (Val >> 16) & 0xFFFF);
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    break;
 +
  case R_NUPLUS_ABS_LOW_LEA:
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    //Check Offset for MOVEI-Type Instructions
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    checkInt(Loc, (Val) & 0xFFFF , 16, Type);
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    applyNaplesPUReloc<16, 2>(Loc, Type, (Val) & 0xFFFF);
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    break;
 +
  }
 +
}
 
</syntaxhighlight>
 
</syntaxhighlight>
  
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==== ELFDumper ====
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All of these implemented relocations relies on the method ''applyNaplesPURelocation'' that simply writes back the value into the instruction.
 +
 
 +
== Linkerscript ==
 +
 
 +
All memory images generated for NaplesPU must be linked in a proper way. This way is specified by the linkerscript:
  
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==== linker ====
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<syntaxhighlight>
 +
stacks_dim = 16K;
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stacks_base = 0x80000;
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threads_per_core = 0x8;
  
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==== elf2hex ====
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SECTIONS
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{
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  . = 0x00000380;
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  .text.vectors : {
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    *vectors.o(.text)
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    . = 0x00000400;
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  }
 +
 
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  .text.start : {
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    *crt0.o(.text)
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  }
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  .text : { *(.text) }
 +
 
 +
  . = 0x00800000;
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  .data : { *(.data) }
 +
 
 +
  . = ALIGN(64);
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  scratchpad : { *(scratchpad) }
 +
 
 +
  .bss : { *(.bss) }
 +
 
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  .eh_frame : { *(.eh_frame) }
 +
 
 +
}
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</syntaxhighlight>
  
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==== lldb ====
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As shown above, the linker script commonly defines where the sections must be placed into the memory. Also, it solves undefined symbols of the start routine, specifying the stack size per-thread, the number of threads and the starting address for the stack frame.
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TBD
 

Latest revision as of 17:21, 21 June 2019

LLD is the LLVM proprietary linker. It is based on the GNU linker, and it is compatible to it in terms of arguments accepted. It also fully supports the ELF generation but also, in a progressive lower percentage, PE/COFF, Mach-O, WebAssembly and custom linker-scripts. LLD is built as a set of libraries to join the main idea of the software modular design.

The NaplesPU implementation of LLD is made on an ELF-based approach, by adding a new Target class inside lld/ELF/Arch folder. NaplesPU.cpp contains the relocation logic and other information needed to support NaplesPU. Each NaplesPU application must be linked together with two additional object files:

  • crt0.o, is the object file resulting of the compilation of the start routine for the custom platform, composed of operations needed to set-up the platform.
  • vectors.o, is the Interrupt Vector Table.

Relocations

This section explains how the relocations are implemented in NaplesPU. All relocations are specified in the relocateOne method implementation. By looking at the target ISA, LLD must check for each instruction type in which an immediate value is specified to verify if it can fit the machine instruction field. 

void NaplesPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
  int64_t Offset;
  switch (Type) {
  default:
    fatal("unrecognized reloc " + Twine(Type));
    case R_NUPLUS_ABS32:
     write32le(Loc, Val);
     break;
   case R_NUPLUS_BRANCH:
     //Check Offset for J-Type Instructions
     checkInt(Loc, Val, 18, Type);
     applyNaplesPUReloc<18, 0>(Loc, Type, Val);
     break;
   case R_NUPLUS_PCREL_MEM:
     //Check Offset for M-Type Instructions
     checkInt(Loc, Val, 9, Type);
     applyNaplesPUReloc<9, 3>(Loc, Type, Val);
     break;
   case R_NUPLUS_PCREL_LEA:
     //Check Offset for I-Type Instructions
     checkInt(Loc, Val, 9, Type);
     applyNaplesPUReloc<9, 3>(Loc, Type, Val);
     break;
   case R_NUPLUS_ABS_HIGH_LEA:
     //Check Offset for MOVEI-Type Instructions
     checkInt(Loc, (Val >> 16) & 0xFFFF , 16, Type);
     applyNaplesPUReloc<16, 2>(Loc, Type, (Val >> 16) & 0xFFFF);
     break;
   case R_NUPLUS_ABS_LOW_LEA:
     //Check Offset for MOVEI-Type Instructions
     checkInt(Loc, (Val) & 0xFFFF , 16, Type);
     applyNaplesPUReloc<16, 2>(Loc, Type, (Val) & 0xFFFF);
     break;
  }
}

All of these implemented relocations relies on the method applyNaplesPURelocation that simply writes back the value into the instruction.

Linkerscript

All memory images generated for NaplesPU must be linked in a proper way. This way is specified by the linkerscript: 

stacks_dim = 16K;
stacks_base = 0x80000;
threads_per_core = 0x8;

SECTIONS
{
  . = 0x00000380;
  .text.vectors : {
    *vectors.o(.text)
    . = 0x00000400;
  }

  .text.start : {
    *crt0.o(.text)
  }
  .text : { *(.text) }

  . = 0x00800000;
  .data : { *(.data) }

  . = ALIGN(64);
  scratchpad : { *(scratchpad) }

  .bss : { *(.bss) }

  .eh_frame : { *(.eh_frame) }

}

As shown above, the linker script commonly defines where the sections must be placed into the memory. Also, it solves undefined symbols of the start routine, specifying the stack size per-thread, the number of threads and the starting address for the stack frame.

Retrieved from "http://www.naplespu.com/doc/index.php?title=NaplesPU_LLD_Linker&oldid=2150"