Difference between revisions of "NaplesPU.td"
From NaplesPU Documentation
| Line 3: | Line 3: | ||
<syntaxhighlight lang="c" line='line'> | <syntaxhighlight lang="c" line='line'> | ||
| + | //===-- NuPlus.td - Describe the NuPlus Target Machine -------*- tablegen -*-===// | ||
| + | // | ||
| + | // The LLVM Compiler Infrastructure | ||
| + | // | ||
| + | // This file is distributed under the University of Illinois Open Source | ||
| + | // License. See LICENSE.TXT for details. | ||
| + | // | ||
| + | //===----------------------------------------------------------------------===// | ||
| + | // | ||
| + | // | ||
| + | //===----------------------------------------------------------------------===// | ||
| + | |||
| + | //===----------------------------------------------------------------------===// | ||
| + | // Target-independent interfaces which we are implementing | ||
| + | //===----------------------------------------------------------------------===// | ||
| + | |||
| + | include "llvm/Target/Target.td" | ||
| + | |||
| + | //===----------------------------------------------------------------------===// | ||
| + | // Register File, Calling Conv, Instruction Descriptions | ||
| + | //===----------------------------------------------------------------------===// | ||
include "NuPlusRegisterInfo.td" | include "NuPlusRegisterInfo.td" | ||
| Line 10: | Line 31: | ||
def NuPlusInstrInfo : InstrInfo; | def NuPlusInstrInfo : InstrInfo; | ||
| − | |||
def NuPlusAsmParser : AsmParser { | def NuPlusAsmParser : AsmParser { | ||
| − | |||
| − | |||
bit ShouldEmitMatchRegisterName = 1; | bit ShouldEmitMatchRegisterName = 1; | ||
} | } | ||
| − | // | + | //===----------------------------------------------------------------------===// |
| + | // Declare the target which we are implementing | ||
| + | //===----------------------------------------------------------------------===// | ||
| + | |||
def NuPlusAsmWriter : AsmWriter { | def NuPlusAsmWriter : AsmWriter { | ||
string AsmWriterClassName = "InstPrinter"; | string AsmWriterClassName = "InstPrinter"; | ||
| − | |||
bit isMCAsmWriter = 1; | bit isMCAsmWriter = 1; | ||
} | } | ||
| Line 32: | Line 52: | ||
let AssemblyWriters = [NuPlusAsmWriter]; | let AssemblyWriters = [NuPlusAsmWriter]; | ||
} | } | ||
| + | |||
</syntaxhighlight> | </syntaxhighlight> | ||
Revision as of 13:55, 5 April 2019
The NuPlus.td file contains the definition of the Target class NuPlus (defined in "compiler/include/llvm/Target/Target.td"). The file also contains the definition of the NuPlusInstrInfo, NuPlusAsmParser and NuPlusAsmWriter required by the Target class. In addition, we avoid using instruction itineraries for scheduling. Itineraries are details reservation tables for each instruction class.
//===-- NuPlus.td - Describe the NuPlus Target Machine -------*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces which we are implementing
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// Register File, Calling Conv, Instruction Descriptions
//===----------------------------------------------------------------------===//
include "NuPlusRegisterInfo.td"
include "NuPlusCallingConv.td"
include "NuPlusInstrInfo.td"
def NuPlusInstrInfo : InstrInfo;
def NuPlusAsmParser : AsmParser {
bit ShouldEmitMatchRegisterName = 1;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
def NuPlusAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
def : Processor<"nuplus", NoItineraries, []>;
def NuPlus : Target {
// Pull in Instruction Info:
let InstructionSet = NuPlusInstrInfo;
let AssemblyParsers = [NuPlusAsmParser];
let AssemblyWriters = [NuPlusAsmWriter];
}