User contributions
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- 13:19, 14 May 2019 (diff | hist) . . (-12) . . Single Core Cache Controller (→To/from LDST)
- 13:19, 14 May 2019 (diff | hist) . . (-55) . . Single Core Cache Controller (→To/from Core interface)
- 13:12, 14 May 2019 (diff | hist) . . (-76) . . Main Page (→Documentation)
- 19:17, 13 May 2019 (diff | hist) . . (+2,123) . . Heterogeneous Tile
- 19:08, 13 May 2019 (diff | hist) . . (-9) . . Heterogeneous Tile
- 19:08, 13 May 2019 (diff | hist) . . (+931) . . Heterogeneous Tile
- 19:05, 13 May 2019 (diff | hist) . . (+1,234) . . Heterogeneous Tile
- 18:59, 13 May 2019 (diff | hist) . . (+57) . . Heterogeneous Tile (→Synchronization Interface)
- 18:58, 13 May 2019 (diff | hist) . . (+1,621) . . Heterogeneous Tile (→Memory Interface)
- 18:56, 13 May 2019 (diff | hist) . . (-28) . . Heterogeneous Tile (→Memory Interface)
- 18:55, 13 May 2019 (diff | hist) . . (+3,722) . . N Heterogeneous Tile (Created page with "The nu+ project provides a heterogeneous tile integrated into the NoC, meant to be extended by the user. Such a tile provides a first example of how to integrate a custom modu...")
- 18:50, 13 May 2019 (diff | hist) . . (-7) . . Main Page (→Documentation)
- 18:48, 13 May 2019 (diff | hist) . . (+81) . . The NaplesPU Hardware architecture (→Testing coherence subsystem)
- 18:47, 13 May 2019 (diff | hist) . . (+113) . . The NaplesPU Hardware architecture (→Many Core System)
- 18:46, 13 May 2019 (diff | hist) . . (-2) . . The NaplesPU Hardware architecture (→Common components)
- 18:46, 13 May 2019 (diff | hist) . . (-1) . . The NaplesPU Hardware architecture (→Single Core Version)
- 18:46, 13 May 2019 (diff | hist) . . (0) . . The NaplesPU Hardware architecture (→Single Core Version)
- 18:45, 13 May 2019 (diff | hist) . . (-6) . . The NaplesPU Hardware architecture (→Single Core Version)
- 18:45, 13 May 2019 (diff | hist) . . (+128) . . The NaplesPU Hardware architecture (→Single Core Version)
- 18:28, 13 May 2019 (diff | hist) . . (+14) . . Extending NaplesPU (→Adding the module in the nu+ pipeline)
- 18:26, 13 May 2019 (diff | hist) . . (+88) . . Extending NaplesPU (→Adding new instruction)
- 18:23, 13 May 2019 (diff | hist) . . (+10) . . Extending NaplesPU (→Adding the module in the nu+ pipeline)
- 18:23, 13 May 2019 (diff | hist) . . (+1) . . Extending NaplesPU (→Adding the module in the nu+ pipeline)
- 18:22, 13 May 2019 (diff | hist) . . (+1,296) . . Extending NaplesPU (→Extending nu+ core pipeline)
- 18:16, 13 May 2019 (diff | hist) . . (+15) . . Extending NaplesPU (→Extending Writeback stage)
- 18:15, 13 May 2019 (diff | hist) . . (+1,078) . . Extending NaplesPU (→Extending Writeback stage)
- 18:09, 13 May 2019 (diff | hist) . . (-617) . . Extending NaplesPU (→Adding custom instruction into nu+ core)
- 18:02, 13 May 2019 (diff | hist) . . (-45) . . Extending NaplesPU (→Extending nu+ core pipeline)
- 18:01, 13 May 2019 (diff | hist) . . (-139) . . Extending NaplesPU (→Extending nu+ core pipeline)
- 17:58, 13 May 2019 (diff | hist) . . (+169) . . Extending NaplesPU (→Extending nu+ core pipeline)
- 17:45, 13 May 2019 (diff | hist) . . (-168) . . Extending NaplesPU (→Definizione dell'unità funzionale e della sua interfaccia)
- 17:41, 13 May 2019 (diff | hist) . . (-468) . . Extending NaplesPU (→Extending nu+ core pipeline)
- 17:37, 13 May 2019 (diff | hist) . . (+939) . . Extending NaplesPU (→Definizione dell'unità funzionale e della sua interfaccia)
- 17:24, 13 May 2019 (diff | hist) . . (-13) . . Extending NaplesPU (→Aggiunta unità funzionale)
- 17:19, 13 May 2019 (diff | hist) . . (-508) . . Extending NaplesPU (→Introduzione dell'istruzione)
- 17:09, 13 May 2019 (diff | hist) . . (-212) . . Extending NaplesPU (→Adding a new intrinsic)
- 16:45, 13 May 2019 (diff | hist) . . (-107) . . Extending NaplesPU (→Extending compiler support)
- 16:42, 13 May 2019 (diff | hist) . . (-48) . . The NaplesPU Hardware architecture
- 16:42, 13 May 2019 (diff | hist) . . (0) . . Main Page (→Documentation)
- 16:42, 13 May 2019 (diff | hist) . . (+12,661) . . N Extending NaplesPU (Created page with "== SystemVerilog coding nu+ guidelines == This is a simple guideline for extending the nu+ architecture. Feel free to extend this guideline as soon as you have a code experie...")
- 16:41, 13 May 2019 (diff | hist) . . (+33) . . Main Page (→Documentation)
- 16:40, 13 May 2019 (diff | hist) . . (-4,295) . . Nu+ HowTos (current)
- 16:40, 13 May 2019 (diff | hist) . . (-1) . . The NaplesPU Hardware architecture (→Customizing nu+)
- 16:40, 13 May 2019 (diff | hist) . . (+4,238) . . The NaplesPU Hardware architecture (→Parametrization and Extending nu+)
- 16:38, 13 May 2019 (diff | hist) . . (-31) . . The NaplesPU Hardware architecture
- 16:35, 13 May 2019 (diff | hist) . . (-28) . . Nu+ HowTos (→Extending compiler support)
- 16:28, 13 May 2019 (diff | hist) . . (+1) . . Nu+ HowTos (→Adding custom instruction into nu+ core)
- 16:14, 13 May 2019 (diff | hist) . . (-708) . . Nu+ HowTos
- 16:02, 13 May 2019 (diff | hist) . . (-54) . . Nu+ HowTos (→SystemVerilog coding nu+ guidelines)
- 16:02, 13 May 2019 (diff | hist) . . (-411) . . Nu+ HowTos (→SystemVerilog coding nu+ guideline)
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